Course Name Code Semester T+U Hours Credit ECTS
Logical Design and Computer Architecture SWE 206 4 3 + 0 3 5
Precondition Courses
Recommended Optional Courses
Course Language English
Course Level Bachelor's Degree
Course Type Compulsory
Course Coordinator Prof.Dr. AHMET ÖZMEN
Course Lecturers
Course Assistants
Course Category Field Proper Education
Course Objective
Course Content
# Course Learning Outcomes Teaching Methods Assessment Methods
1 Analog/dijital işaretleri ve kodlamayı bilir. Lecture, Testing,
2 Boolean matematiği bilir, lojik ifadeleri sadeleştirir. Lecture, Drilland Practice, Testing, Homework,
3 Donanım programlama dili (Verilog-HDL veya V-HDL) bilir. Lecture, Drilland Practice, Testing, Homework,
4 Karmaşık kombinasyonel ve ardışıl devre tasarımını yapar. Lecture, Question-Answer, Drilland Practice, Testing, Project / Design,
5 Karmaşık lojik devre simülasyonunu ve sentezlemesini yazılım aracı kullanarak yapar. Lecture, Simulation, Testing, Project / Design,
6 Basit bir işlemcinin komutlarını tasarlar ve yazılım araçları ile simüle eder. Lecture, Project Based Learning, Testing, Project / Design,
7 Ön bellek mimarilerini ve performansa etkilerini açıklar Lecture, Discussion, Testing, Homework,
Week Course Topics Preliminary Preparation
1
2 Boole cebri lojik ifadelerin sadeleştirilmesi, Verilog-HDL tanıtımı
3 Kombiansyonel lojik devre tasarım ilkeleri
4 Verilog-HDL tasarım modelleri (kapı seviyesi, davranışsal, veri akışı modeli)
5 Verilog ile kombinasyonel devre tasarımı ve simülasyonu
6 Ardışıl lojik devre tasarım ilkeleri
7 Verilog ile ardışıl lojik devre tasarımı ve simülasyonu
8 Verilog ile karmaşık lojik devre tasarımı ve simülasyonu
9 İşlemci komut kümesi mimarileri (ISA)
10 Verilog ile işlemci kontrol lojiği tasarımı ve simülasyonu
11 Basit bir işlemci komutlarının tasarımı ve Verilog ile simülasyonu
12 İşlemci tasarımı proje çalışması
13 Ön bellek tasarımı ve başarıma etkisi
14 Proje çalışması (FPGA ile karmaşık lojik devre sentezleme)
Resources
Course Notes
Course Resources
Order Program Outcomes Level of Contribution
1 2 3 4 5
1 To have sufficient foundations on engineering subjects such as science and discrete mathematics, probability/statistics; an ability to use theoretical and applied knowledge of these subjects together for engineering solutions.
2 An ability to determine, describe, formulate and solve engineering problems; for this purpose, an ability to select and apply proper analytic and modeling methods,al background in describing, formulating, modeling and analyzing the engineering problem, with a consideration for appropriate analytical solutions in all necessary situations.
3 An ability to select and use modern techniques and tools for engineering applications; an ability to use information technologies efficiently.
4 An ability to analyze a system, a component or a process and design a system under real limits to meet desired needs; in this direction, an ability to apply modern design methods.
5 An ability to design, conduct experiment, collect data, analyze and comment on the results and consciousness of becoming a volunteer on research.
6 Understanding, awareness of administration, control, development and security/reliability issues about information technologies.
7 An ability to work efficiently in multidisciplinary teams, self confidence to take responsibility.
8 An ability to present himself/herself or a problem with oral/written techniques and have efficient communication skills; know at least one extra language.
9 An awareness about importance of lifelong learning; an ability to update his/her knowledge continuously by means of following advances in science and technology.
10 Understanding, practicing of professional and ethical responsibilities, an ability to disseminate this responsibility on society.
11 An understanding of project management, workplace applications, health issues of laborers, environment and job safety; an awareness about legal consequences of engineering applications.
12 An understanding universal and local effects of engineering solutions; awareness of entrepreneurial and innovation and to have knowledge about contemporary problems.
Evaluation System
Semester Studies Contribution Rate
1. Ara Sınav 60
1. Kısa Sınav 10
1. Proje / Tasarım 15
2. Proje / Tasarım 15
Total 100
1. Final 50
1. Yıl İçinin Başarıya 50
Total 100
ECTS - Workload Activity Quantity Time (Hours) Total Workload (Hours)
Course Duration (Including the exam week: 16x Total course hours) 16 3 48
Hours for off-the-classroom study (Pre-study, practice) 16 2 32
Mid-terms 1 10 10
Quiz 1 1 1
Project / Design 2 10 20
Final examination 1 15 15
Total Workload 126
Total Workload / 25 (Hours) 5.04
dersAKTSKredisi 5